The AlphaChip Team That Laid Out Four TPUs Now Wants Every Company to Be Designless

Azalia Mirhoseini opens with the mismatch that became a company. Right now there cannot be much co-design between chips and models, because the design cycle is asymmetric: chips take so long that the next generation of AI methods outruns the next generation of silicon. If chips can be made much faster, she says, workloads, applications, and chips can co-evolve. On Sequoia’s *Training Data*, hosts Stephanie Zhan and Sonya Huang introduce her and Anna Goldie as the team behind Google’s AlphaChip, used on four generations of TPUs, now founding Ricursive Intelligence to take AI across the whole design flow and move the industry from fabless to designless.

Asked why chip design is the compute bottleneck, Goldie rewinds to the original moonshot. Neural nets had been around for decades; they did not become effective until the computers and chips got powerful. Now that the models are powerful, the same loop can run the other way: use AI on the bottlenecks in chip design and produce more effective compute. Scaling laws say that more compute at training or inference yields more intelligence. The hardware underneath is still a GPU, originally for graphics, later for crypto, then for neural nets because it is good at large matrix multiplies. Co-optimize the model and the hardware, she argues, and you get more effective compute and can push farther out on those curves.

AlphaChip started in 2018, and not even on floorplanning. Goldie and Mirhoseini first mapped neural networks onto chips as a compiler problem, published strong results, then looked for the highest-impact follow-on. Chip placement was it. They knew almost nothing about the design process, so they attached themselves to Google’s TPU team from the start. AI was already talked about; it was nowhere near today’s scale. They had to show data, iterate, and listen. Eventually a research concept on placement became something that taped out in product.

Early reactions were super skeptical. The two researchers had read the academic literature and trained an RL agent to optimize half-perimeter wire length, the number papers report. They were excited to share it. The TPU team was, Goldie recalls, kind of angry: why are you showing us this? We do not care about half-perimeter wire length. We want routed wire length, horizontal and vertical congestion, timing violations, power, and area. The pair kept listening. Another lesson: make the customer feel part of it. Mustafa on the TPU team built very fast congestion and density cost functions; they optimized those approximations, then ran a commercial tool to show the proxies actually correlated with the metrics the chip owners lived by.

Sonya Huang comes from an EDA family and calls floorplanning the crown jewel. Mirhoseini explains it as placing a chip’s components onto silicon. Even a single block, not the whole die, can be a graph of millions of nodes, all of which must be placed and routed under power, performance, and area constraints plus the physical rules of a tiny TSMC node. It is large-scale combinatorial optimization, and the metrics themselves are hard to evaluate. Classically this is Cadence and Synopsys. Their method was a reinforcement-learning agent that tried placements, learned from good and bad examples in an environment they built, and improved iteratively. The essential difference from prior tools was the ability to learn from experience, the way a human expert gets better by solving more and harder instances.

Huang analogizes to AlphaGo’s move 37, the play no human would make. AlphaChip produced strange curved placements, including donut shapes. Humans tend to align the large memory macros neatly, put logic in the middle, and run wires between. Curves can shorten wire length, which cuts power and timing violations, but the complexity of a curved layout was more than people wanted to take on; it felt risky. Goldie laughs and calls them aliens. A few milestones then made the work look like a company: superhuman results on some blocks; a chip that taped out and came back working, which is an expensive thing to get wrong; and, on the algorithmic side, models that got better as they solved more problems. Once you are there, Mirhoseini says, there is no stopping the AI. It can see more instances than any single human ever will.

AlphaChip targeted one module of physical design. Chip design has many more stages. They think the stack is ready now: LLMs, graph optimization, synthetic data, large-scale distributed compute. That is why the company exists at this moment. Training data is the binding constraint. Open source is not that interesting. Customers will share data, but the founders will not train on it; they want each customer’s data private and siloed. Synthetic data is the bet. Both of them worked on synthetic data for code-domain LLM tasks across Claude and Gemini, and they see a path to orders of magnitude more data than any customer could ever hand over.

When did the chip experts stop doubting? Goldie’s method was weekly data, every week, for a couple of years. Stakes are high. A TPU is large enough to split into dozens of blocks, each owned by a person or a small team. If anything goes wrong, it is their fault. They already had their own layouts from commercial tools. Then an AI layout arrived, looking weird and curved, and someone had to pick it over their own work and take responsibility. That requires winning every single metric. Across successive TPU generations the agent was adopted on more blocks and more area, and became increasingly superhuman. A public AlphaChip blog showed three generations; it was used in a fourth after publication. The gap versus the human-and-tool baseline is still growing, which Goldie calls a property of how AI scales with data: more TPU blocks in the training set, a better placer.

Why Ricursive? Because the company is AI for chip design and chip design for AI. The spelling is a palindrome of initials: RI, Ricursive Intelligence, are the first two letters of the name. Chips are the fuel for AI, and scaling laws—pre-training, post-training, test-time—drive much of the progress. The faster you can make chips that are more custom for the models you actually run, the more efficient the compute, the more the scaling curve bends, the sooner the next generation of AI arrives, and the better that AI can design the next chip. That is the self-improvement loop they are after. Huang calls it a root-node problem for the broader race.

The industry vision is to go from fabless to designless. It used to be obvious that no serious chip company could exist without its own fab. TSMC created a world of enormously valuable fabless firms, NVIDIA among them. Goldie and Mirhoseini think you can now create valuable companies that do not need in-house design teams. Firms already serving models at massive scale are spending a hundred billion dollars plus on AI inference this year, and growing. They would benefit from custom silicon to serve or train those models, but that currently means hundreds or thousands of human experts on staff. Designless is meant to make that unnecessary, the way cloud made owning the machine room unnecessary.

Zhan lists the stack already going custom: Google’s TPUs, Amazon’s Trainium, OpenAI with Broadcom, maybe Tesla. The founders expect more co-design across model, data, software, and chips, and they expect individual companies to end up with multiple architectures. Co-design is the path to efficiency, Mirhoseini repeats, and it is blocked today by that slow silicon cycle. The value is not only cheaper or faster design. It is applications that do not exist unless inference is cheap and low-power enough: AR and VR, hearing aids, chips in space. Computing, they argue, is going to be ubiquitous; custom silicon is how those AIs run at the efficiency the scale demands.

Phase-one customers are people already designing chips—NVIDIA, AMD, ARM, MediaTek—who want a faster cycle. The founders do not want to stop at tools. Any customer with a family of workloads at sufficient scale should be able to get custom silicon without standing up a giant design org. That, they say, is the Cambrian explosion. Huang notes the EDA duopoly, Synopsys and Cadence, both adding AI, and that her parents both worked at Cadence. Goldie positions Ricursive from the opposite direction: a frontier AI lab, Google Brain and Anthropic in the background, trying to reimagine the flow rather than replace modules one at a time. Point solutions are not the point. Co-optimizing stages is, and that needs an AI-native approach.

Chip-design people, Huang guesses, span extreme excitement, extreme skepticism, and fear. Some want to be customers or colleagues; the ambition also invites doubt. There was spicy niche-internet uproar around AlphaChip, with people saying the results were not really real. Mirhoseini’s read is that this happens whenever AI walks into a new field and does something disruptive. Huang names the bitter lesson; they are true believers. It is hard to accept that a new, more end-to-end way of looking at problems people have worked for decades, coming from outsiders without an EDA background, is being productionized. The true spillover, she says, was larger than the placement problem itself: RL and graph-net methods spread across chip design, including a DAC 2023 best paper whose first author is now on the Ricursive team, plus attention that helped stand up conferences such as LLM-Aided Design. Goldie once met a student whose entire Ph.D. was inspired by AlphaChip. How did he find the paper? Because of the controversy.

What surprised her was who got upset. She expected physical designers whose jobs looked at risk. Those people were skeptical and needed a lot of data to change their minds, but they were not the angry ones. The people who were stung had developed the prior methods. In retrospect that makes sense. You pour time, ingenuity, and a bit of soul into an approach, and then outsiders show up with something simpler, scaled with data and compute, and outperform you. It is painful. Everyone can build on top of it, they add. Huang then asks the opposite question: LLMs got so good at coding, why won’t they just get good at chip design? Why a specialized lab?

Because a lot of chip design is not language or code, Mirhoseini says. A big chunk is graph structure and physical constraints: hard combinatorial optimization that wants custom AI methods. The plan is hybrid. Apply the right method to each problem. They love LLMs and will use them extensively for the stages where they help; they will not be sufficient for all of it. Separate, very fast, specialized optimization modules have to exist so an LLM can iterate around them. They remain believers in AGI and the bitter lesson. They just want to be on that frontier with better chips.

What does a world with AGI look like? Goldie jokes that maybe we can all take a vacation. Mirhoseini is more expansive: extreme productivity for every person, economic value at a scale that does not exist today, and, if we are careful, distribution at that scale too. She is optimistic if the value is shared. Data centers in space? Why not. That would want custom silicon—different temperatures, different radiation and reliability—just as Pixel phones already have many “corners” for temperature and voltage. If the company works, Huang notes, space will not be a field of making existing GPUs survive; it will have compute designed for orbit.

A couple of weeks after incorporating they are already a talent magnet: Jiwoo, Yi-Chen, Dan, Ebrahim. They want top people at every stage of chip design and, as a frontier AI lab, pre-training through mid-training, post-training, RL, evals, and data, plus operators, recruiting, and a chief of staff. In a year they intend to release a first product and strong commercial partnerships, offered not only to partners but more broadly to chip designers. The product will hit the long poles of the flow and be more end-to-end than what people can buy today. What do human engineers do then? Early on, they can come reimagine the process. Later, the analogy is Claude Code or Cursor: less hands-on typing, more amplification. AlphaChip already spat out Pareto curves of trade-offs; each point used to take humans weeks, and the model generates many of them. The human job becomes deciding what you actually want. Huang jokes that we are going to vibe-code chips. Goldie says maybe not quite.

They have worked with Jeff Dean, Noam Shazeer, Quoc Le, and others. The lesson is a high bar, real passion for the problem, and being genuinely nice—a collaborative culture where everyone is heard. Dean, Goldie says, has breadth, depth, speed, and integrity: intern and president of the universe get the same respect. His performance feedback to her was to ask for more from other people. Quoc Le managed them for almost ten years and left two lines: deep learning makes us Renaissance people who can contribute across fields, and you should have fun at the company. If everyone is having fun, they will do better work together. Huang closes by calling Ricursive the frontier lab for AI chip design.