How Modern CPUs Execute Code: Pipelines, Branches and Memory

Matt Godbolt explains common performance mechanisms and measurement tools.

MGMatt GodboltVortrag
Kanal
GOTO Conferences
Veröffentlicht
16. Apr. 2025
Video
43:28
Lesezeit
2 Min.
Original
Englisch
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Matt Godbolt introduces out-of-order execution, branch prediction, register renaming and memory behavior. Through Bloom filter and linked-list examples, he demonstrates how to inspect bottlenecks and stresses real-world benchmarking.

  1. 1PipelineIndependent instructions can execute out of order while retirement preserves program order.
  2. 2Branch predictionPrediction keeps the pipeline supplied but wrong guesses waste work.
  3. 3Register renamingRenaming removes some false register dependencies.
  4. 4PredictabilityInput order can influence branch behavior.
  5. 5Bloom filterA Bloom filter allows false positives but can rule out absent values.
  6. 6SimulationUse llvm-mca as a model and benchmark real workloads.
  7. 7MemoryMemory layout and pointer dependencies can dominate performance.

Das Wichtigste

  1. Independent instructions can execute out of order while retirement preserves program order.
  2. Prediction keeps the pipeline supplied but wrong guesses waste work.
  3. Renaming removes some false register dependencies.
  4. Input order can influence branch behavior.
  5. A Bloom filter allows false positives but can rule out absent values.
  6. Use llvm-mca as a model and benchmark real workloads.
  7. Memory layout and pointer dependencies can dominate performance.
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01

The CPU pipeline

Out-of-order execution and retirement.

At GOTO Chicago 2024, Matt Godbolt offers a simplified view of modern CPU pipelines, branch prediction and memory, with a focus on x86 examples. He recommends measuring real workloads rather than relying on intuition or a simulator alone.

The front end fetches and decodes instructions; the execution machinery can run independent operations out of order while respecting dependencies. Retirement commits instructions in program order in the simplified model, even though execution may have been reordered.

A branch predictor guesses control flow early enough to keep a long pipeline supplied. Correct guesses avoid wasted work; a misprediction requires the processor to discard speculative work and restart on the correct path.

Register renaming reduces false dependencies caused by reusing architectural registers. Multiple execution units can work in parallel when their inputs and resources are available.

02

Branch prediction

History and a data-order experiment.

Godbolt gives a high-level account of predictors using branch locations and history. He compares a loop over random data with the same data sorted, illustrating that predictable control flow can affect runtime even through a language interpreter.

03

Analyzing execution

Bloom filters, division and compilers.

A Bloom filter example introduces a probabilistic set test: it can say definitely absent or possibly present, allowing false positives. Godbolt uses the example to inspect the cost of operations in an execution pipeline.

In Compiler Explorer he uses llvm-mca to simulate instruction scheduling. A dynamic modulus can lead to expensive division in his example; choosing a power-of-two table size allows a mask, but that choice can affect hashing behavior and must be evaluated for the application.

The compiler may replace division by a known constant with a sequence of multiplications and shifts. The details depend on the compiler, target and data types, so inspect generated code and benchmark before making changes.

04

Memory and measurement

Cache behavior and perf.

Memory access and cache behavior can dominate runtime. In his linked-list experiment, sequential layout is much faster than randomized pointers because access patterns, dependencies and prefetching differ. The numbers describe his test, not every machine.

He closes with top-down performance analysis and perf counters to distinguish front-end, speculation, execution and memory bottlenecks. The talk covers one core and leaves multicore coherence and SIMD for further study.

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